Logic synthesis

Logic synthesis

Jesse Russell Ronald Cohn

     

бумажная книга



ISBN: 978-5-5110-0044-2

High Quality Content by WIKIPEDIA articles! In electronics, logic synthesis is a process by which an abstract form of desired circuit behavior, typically register transfer level (RTL), is turned into a design implementation in terms of logic gates. Common examples of this process include synthesis of HDLs, including VHDL and Verilog. Some tools can generate bitstreams for programmable logic devices such as PALs or FPGAs, while others target the creation of ASICs. Logic synthesis is one aspect of electronic design automation.