Please note that the content of this book primarily consists of articles available from Wikipedia or other free sources online. In electronic design automation, parasitic extraction is calculation of the parasitic effects in the interconnects of an electronic circuit: parasitic capacitances, parasitic resistances and parasitic inductances, commonly called parasitic devices, parasitic components, or simply parasitics.Major purposes of parasitic extraction are signal delay calculation, timing analysis, circuit simulation, and signal integrity analysisIn early integrated circuits the impact of the wiring was negligible, and wires were not considered as electrical elements of the circuit. However below the 0.5-micrometre technology node resistance and capacitance of the interconnects started making a significant impact on circuit performance With shrinking process technologies inductance effects of interconnects became important as well.

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