XOP Instruction Set

XOP Instruction Set

Lambert M. Surhone, Miriam T. Timpledon, Susan F. Marseken

     

бумажная книга



Издательство: Книга по требованию
Дата выхода: июль 2011
ISBN: 978-6-1310-5758-8
Объём: 88 страниц
Масса: 153 г
Размеры(В x Ш x Т), см: 23 x 16 x 1

High Quality Content by WIKIPEDIA articles! The XOP instruction set, announced by AMD on May 1, 2009, is an extension to the 128-bit SSE core instructions in the X86 and AMD64 instruction set for the Bulldozer processor core, due to begin production in 2011. XOP is a revision of the SSE5 instruction set proposal announced on August 30, 2007. This revision makes the binary coding of the proposed new instructions more compatible with Intel's AVX instruction extensions, while the functionality of the instructions is unchanged. AMD have changed the encoding from the original SSE5 specification in order to improve compatibility with Intel's AVX instruction set and the new VEX coding scheme. All SSE5 instructions that were equivalent or similar to instructions in the AVX and FMA4 instruction sets announced by Intel have been changed to use the coding proposed by Intel.

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